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Intel details its advanced low power Tremont microarchitecture

by Mark Tyson on 25 October 2019, 10:11

Tags: Intel (NASDAQ:INTC)

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Intel revealed the first official details of its Tremont next-generation low-power x86 microarchitecture at the Linley Fall Processor Conference yesterday. Destined for use in Atom processors, this tech might not catch PC enthusiast eyeballs so readily, but those on the lookout for a compact, low power second PC might find Tremont-based devices appealing when they emerge. Elsewhere Intel expects Tremont-based processors to be popular in IoT, efficient data centre products and more.

With the introduction of Tremont, Intel trumpets a very significant IPC improvement. It had designed the architecture to target single thread performance as well as performance per watt and performance per mm2, for great battery life and efficiency. Intel's efforts have precipitated an IPC uplift of 30 per cent + compared with previous gen Goldmont Plus architecture chips.

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What is behind the performance gains? Intel has implemented a number of advancements in the architecture and notably includes L3 cache - a first for an Atom, plus new power management enhancements, and support for new instructions, and 'Core-class' branch prediction. Diving deeper, Intel says that these 10nm chips feature a "unique 6-wide (2×3-wide clustered) out-of-order decoder in the front end allows for a more efficient feed to the wider back end, which is fundamental for performance". New instructions are implemented for faster integer and vector execution - and Intel Speed Shift makes the processor more responsive to system demands.

It isn't all performance tweaks, Intel has also baked in CPU Secure Boot tech and Total Memory Encryption. Remember, that it expects these processors to be popular across client, data centre, 5G device and in IoT appliances.

You might remember recently that Microsoft's Surface Neo was said to be powered by an Intel chip that features Tremont cores. If you look back at our article from early October you will see that the Neo features a Lakefield hybrid CPU using Foveros 3D packaging technology. Inside that chip is a mix of power efficient Tremont cores with a performance scalable Sunny Cove core to do the heavier lifting (similar to Arm's big.LITTLE idea), and next gen graphics - all in a 12x12x1mm package.

We don't have any specs of specific processors that will feature Tremont cores as yet. Like the Surface Neo, they may still be several months away from reaching devices in retail. Before Tremont arrives in force there will still be a Gemini Lake Refresh using Goldmont cores to wait through.



HEXUS Forums :: 2 Comments

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Charlie has a rather interesting and detailed write up on the core. Says that it actually executes x86 instructions directly rather than using uOPs which would be really odd if true as I don't think anyone has done that since the last Cyrix chips. That would make it interesting, though not interesting enough for me to actually want to own one :)

https://semiaccurate.com/2019/10/24/intel-outs-the-tremont-atom-core/

Still doesn't quite look as fast as an ARM A77 to me.
DanceswithUnix
Charlie has a rather interesting and detailed write up on the core. Says that it actually executes x86 instructions directly rather than using uOPs which would be really odd if true as I don't think anyone has done that since the last Cyrix chips. That would make it interesting, though not interesting enough for me to actually want to own one :)

https://semiaccurate.com/2019/10/24/intel-outs-the-tremont-atom-core/

Still doesn't quite look as fast as an ARM A77 to me.

The original Bonnell Atom did the same thing.
https://www.anandtech.com/show/2493/9