Processor configurations
We used our X6800 clocked to 2.66GHz to represent an E6700, as the clock speed is the only significant difference between the two processors. As you can see, other than being a later stepping and revision, the QX6700 is essentially identical to the E6700, other than the fact that there are two of them, each with 4MB of L2 cache.
The Q6600 and Q6400 only differ from the QX6700 in their clock multiplier, resulting a lower overall clock speed. Otherwise, they have the same twin allocation of 4MB L2 cache for each dual-core die, making 8MB in total. We've simulated the potential performance of the Q6600 by knocking down the multiplier on the QX6700.
We also simulated a Pentium D 925 using our labs Pentium Extreme Edition 965, to give you an idea how the Core 2 Extreme and the upcoming Quads compare to a sub-£100 dual-core processor. We've switched off the 965's HT and VT technologies, which aren't present in a regular 925. The Pentium D 925 has half the Level 1 data cache of the Core 2 per core. However, its Level 1 instruction cache can’t be directly compared because the Netburst architecture stores decoded instructions, with each core having room for 12,000 of them. You can also see how the Pentium D’s Level 2 cache is dedicated to each core, rather than shared between both, although the total is the same 4MB.
In contrast to the Pentium D, Core 2 has gone back to the traditional approach of simply storing 32KB of non-decoded instructions per core in its Level 1 instruction cache. Although the Level 2 is shared between pairs of cores, each one has its own dedicated Level 1.
The above picture shows the memory timings for the Pentium D 925, which is the same as the Core 2 range below, but the Pentium D runs at 800MHz FSB and uses a 1:2 FSB:DRAM ratio
The Core 2 Extreme QX6700 And Quad CPUs ran our DDR2-800 memory at exactly the same settings as the Core 2 Duo, but both have a1 ,066MHz FSB, the multiplier is 2:3 rather than 1:2.
