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Review: SiS655FX dual-channel P4 chipset

by Tarinder Sandhu on 9 October 2003, 00:00

Tags: SiS (TPE:2363)

Quick Link: HEXUS.net/qat3

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Exactly what is it ?

A detailed perusal of the chipset's block diagram should help us understand just how SiS attempts to compete with the competition.

First and foremost is the support for the new-ish Pentium 4 800MHz FSB CPUs. These currently range from the 2.4GHz model up to the range-topping 3.2GHz, and all support Hyper-Threading technology natively. That in itself makes them a far more attractive proposition than the 533MHz FSB CPUs (3.06GHz excepted). The SiS655FX North Bridge is charged with communicating with the CPU, system memory and AGP graphics card, which supports 8x AGP transfers. There's very little point in being able to run the new breed of P4s if the North Bridge cannot handle DDR400 memory. Keeping it all synchronous is usually the best way to go. The SiS655FX supports dual channel DDR333 / DDR400 memory right out of the box. That's a potential 6.4GB/s of bandwidth, and perfectly in tune with the requirements of a P4 'C' CPU.

A closer look at the North Bridge reveals the usual suspects. The most interesting part is SiS' implementation of its dual 64-bit memory controllers. The performance mode is considered to be a 128bit interface, such that two or four identical DIMMs, with respect to size and type, are used. That's where memory matching comes into play, as all 'sets' have two modules of identical structure. The slightly lesser performing 2 x 64bit mode is when one has two modules that aren't perfectly matched, say a 512MB module and a 256MB module. The SiS655FX North Bridge is pretty flexible in DRAM size and arrangement, more so than its Intel counterparts.

SiS probably makes claims of a greater degree of DRAM compatibility in the performance modes, however if you're intending on purchasing a dual channel motherboard it makes implicit sense to purchase two identical DIMMs in the first instance. We suppose that SiS allows the purchaser to use existing RAM better. The MuTIOL bridge interconnect is a 16-bit wide bus that runs at 533MB/s in each direction, affording 1GB/s bandwidth in total. That's way short of AMD's HyperTransport's 6.4GB/s, but it should be enough to cater for bus traffic generated by most users. As the South Bridge is the one that carries a number of high-speed features let's see what SiS has in mind.

The SiS964 is a pretty integrated South Bridge. It natively supports 2 SATA drives in either independent, RAID0 (striping for performance) and RAID1 (mirroring for security) and JBOD ( Just a Bunch Of Disks - combines the capacity of any two drives to form a single virtual drive) formats. That more or less puts it on a par with Intel's ICH5R and VIA's VT8237. It would be nice if the South Bridge could incorporate another couple of controllers for greater SATA flexibility and the possibility of RAID0+1 support. Standard IDE drives are catered for, with the usual 4 drives being split over 2 channels.

Further high-speed connectivity comes in the form of no less than 8 USB2.0/1.1 ports, all integrated. AC'97 6-channel sound and 10/100 LAN is present too. What's missing is native FireWire support. It's also interesting to note that neither the ICH5R or VT8237 feature it. We get the distinct impression that SiS is attempting to match the competition rather than beat it. Intel has its spiffy North Bridge-attached CSA Gigabit LAN, and VIA has its extra SATALite interface. SiS, however, may choose to include an add-on chip that carries an extra 2 SATA and 2 PATA channels, thereby giving the total solution the aforementioned RAID0+1 ability. As it's not on-chip, it'll have to negotiate transfers on the PCI bus; not as elegant as an integrated South Bridge design, unfortunately.

Trendy names are in fashion right now. AMD's HyperTransport surely leads the way. SiS, not to be outworded, has a technology dubbed HyperStreaming. Put simply, it's about reducing bottlenecks that are born from the way a PC's peripherals, DRAM and resources interact with one another. For example, when a request is made to the North Bridge, the interconnecting bus is engaged until the request is responded to. This ties up the bus at the cost of system inefficiency. SiS uses a split transaction approach wherein the bus is released as soon as the request is received, either for a response or for another request. There's no resource hogging. The system can also utilise multiple streams with concurrent execution, through the use of expanded data transmission. The traditional approach is to have all streams share a single bus and wait in line to get processed. A classic example would be in copying files from one drive to another. Concurrent, intelligently-managed streams should allow more data to passed through the bus at any given time.

SiS also claims that HyperStreaming Engine can give certain requests greater priority over others. As an example, streaming high-quality video requires a sustained throughput. The Engine intelligently allocates bus resources to what it considers to be the most vital information currently being transferred; usually real-time video related. Further, SiS' Engine uses what it terms Smart Flow Control to organise transfers to and from system memory in an orderly fashion.

By grouping streams together when writing to system RAM, the Engine can more easily pull them from memory when requested, rather have to pull out each segment bit by bit. It's all about reducing latencies and delays encountered in the traditional request and respond model. Intelligent split transaction algorithms, multiple streaming running side by side, prioritising key data, and effectively managing request and data streams help in SiS' HyperStreaming goal. In the real world, that entails super smooth data transfers, perfect high definition video streaming over a network and glitch-free high-speed internet access.