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Review: Intel i875P Canterwood

by Tarinder Sandhu on 14 April 2003, 00:00 4.5

Tags: Intel (NASDAQ:INTC)

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Chipset analysis I

Nothing illustrates the nuances of a chipset better than a block diagram, so here it is. Taken from Intel's own spec. sheets.

I'd like to comment on some of the more pertinent features

800FSB / 6.4GB/s data transfer speed

The growing disparity between CPU MHz and CPU FSB speed has been something of a worry for those concerned with performance. With CPU speeds escalating to multi-Ghz and beyond, and showing absolutely no signs of abating in the near future, the need to push the CPU's FSB, amongst other things, is of immediate concern. FSB (Front-Side-Bus), put simply, governs just how much data can be fed to the CPU at any one time. The idea of keeping a deep-pipelined processor full of data is an important one. If the processor is waiting around to be fed data from system memory, it's burning precious cycles doing very little. Keeping the processor loaded with a glut of data is a key aim of any system designer.

So we really need to have masses of data travelling from system memory to a multi-GHz P4, if overall performance is our aim. Currently, the fastest available Pentium 4 clocks in at 3.06GHz. Run off a 133FSB (533 quad-pumped), it can, potentially, deliver ~ 4.26GB/s of data ((64-bit/8)) x 533) to the CPU. That's why running single-channel RAM asynchronously, at 133FSB, still pays performance benefits, simply because we're not satiating the bandwidth requirements of the P4's quad-pumped FSB. Even single-channel RAM, run asynchronously, at 133FSB and DDR-400 speeds, will only be able to deliver a theoretical 3.2GB/s, far short of the 4.26GB/s that we have on offer, and all that's without taking asynchronous memory latencies into account.

To maximise the FSB's ability, Intel launched the E7205 (Granite Bay) chipset. With dual 64-bit DDR memory controllers (~2.13GB/s each at 133FSB), it, theoretically, matched the P4's FSB requirements perfectly. Benchmarks showed that it comfortably eclipsed the performance standards laid down by single-channel memory. In bandwidth terms, more is always better. Intel realised that there wouldn't be a whole lot to gain by introducing dual-channel DDR support at DDR333 speeds. The 533FSB wouldn't really be able to channel all of it through, via the MCH, to the CPU.

As dual-channel memory bandwidth matched what the MCH could push out to the CPU, a faster FSB was needed. Intel chose to miss out the 166FSB, recently adopted by certain AMD processors, and went straight for performance jugular with an 800MHz (200FSB quad-pumped) system bus. That would give us the ability to pump 6.4GB/s from memory, via the MCH, to the CPU. To keep everything balanced, 2 64-bit DDR memory controllers running at DDR-400 speeds would match the MCH's 6.4GB/s bandwidth ability. As we'd need a new 800FSB compatible P4 to run in the best performance mode, a newer iteration of Pentium 4s is on the horizon. However, the Canterwood retains the ability to run present 533 CPUs too.

Gigabit LAN with CSA

The block diagram also shows an Intel Gigabit connection. That's of no real surprise, as the Canterwood is aimed squarely at the workstation / enthusiast market, much like the Granite Bay. The obvious difference, though, and immediately recognisable to those with a tech bias, is just how it connects up to the chipset. The traditional Gigabit model has it situated running off the South Bridge (more on this later). That's how you would expect a standard PCI-based Gigabit LAN card to hook-up to the system. The problem with this is a rather simple one. A standard 32-bit/33MHz PCI bus can push around 1.06Gbps of traffic, the same as a dedicated Gigabit connection. However, with a Gigabit connection able to saturate the entire PCI bus, it leaves very little room for other resources. Further, you cannot run a true full-duplex Gigabit connection from the aforementioned 1.06Gbps PCI bus either. To compound matters even further, a typical network connection request goes from the hard drive - Southbridge - Northbridge - RAM - Northbridge - Southbridge - LAN port. That's a lot of unnecessary work in Intel's eyes.

Communication Streaming Architecture (CSA) is Intel's term for reducing this system latency. The Intel fifth-generation 82547EI Gigabit Ethernet Controller is attached to the Northbridge (MCH) via a dedicated 266MB/s (2.128Gbps) link. This ensures that fast Ethernet transfers don't negatively impact upon the Southbridge's (ICH5) ability to run other PCI-based devices, because it's no longer a part of it. The faster link also allows for true full-duplex Gigabit connections. To top it all of, and thinking about it in a logical manner, network traffic doesn't have to traverse the Southbridge in one instance, thereby making it that little bit more efficient. Connecting a Gigabit connection to the Northbridge via a dedicated link seems like an obvious solution; we wonder why it hadn't been attempted before.

ICH5/R

A new chipset and a new Southbridge. The ICH4 (I/O Controller Hub v4), first introduced on the i845E series of boards, integrated 6 USB2.0 ports. It was up to motherboard manufacturers to specify as many as they felt were warranted. The need for discrete USB2.0 controllers almost evaporated overnight. This time around, another 2 have been added, giving a total of 8, all on a 60MB/s (480Mbps) link to the ICH5. Of most interest is the integrated S-ATA (Serial ATA) controllers. We've seen S-ATA ports being specified on a number of deluxe motherboards for some time now, however those have required discrete controllers (read drivers) to function. Serial ATA will slowly replace parallel IDE as the format of choice in home systems. Smaller, thinner cables, higher potential transfer speeds, simpler routing, and hot-swapability are just some of the advantages. The integration of 2 independent 150MB/s controllers (and two ports) ensures driver-less usage, just like P-ATA. Speaking of P-ATA, Intel have steadfastedly ignored the pseudo ATA133 standard currently employed by Maxtor; the ports remain ATA-100-compliant.

Another closer examination of the ICH5 reveals the possibility of S-ATA RAID (ICH5/R). I'll discuss this new feature when we examine the Intel 875 "Bonanza" board itself.