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Intel Xeon W5580: Nehalem tackles the enterprise

by Parm Mann on 1 April 2009, 14:29

Tags: Xeon W5580, Intel (NASDAQ:INTC)

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Intel Xeon 5580

At first glance, the Xeon W5580 could easily be mistaken for the Core i7 965 Extreme Edition. Built on a 45nm process and supporting socket LGA1366, it's a 3.2GHz monolithic quad-core chip that's equipped with the same cache hierarchy - that's 64KB of L1 cache for each core (split for data and instructions), 256KB per-core L2, and an inclusive 8MB L3.

Highlighting its strength over preceding Penryn-based Xeon parts, the Xeon W5580 features Nehalem's FSB-replacing tri-channel memory controller, built directly into the CPU. Supporting tri-channel ECC registered DDR3 1,333MHz memory, it's a solution that'll provide enough bandwidth to eclipse Intel's previous Xeon offerings.

Throw in Hyperthreading, an extended 64-bit macro-op, an upgraded Loop Stream Detector, a modified branch predictor and a slew of new SSE instructions and there's no mistaking that this is Nehalem through and through. So what's changed?

Aside from a number of smaller optimisations - including pre-fetchers optimised for workstation scenarios - the Xeon W5580's most notable addition is the inclusion of a second QuickPath Interconnect (QPI).

Whereas Core i7 parts feature a single point-to-point QPI to link in with the rest of a system, the Xeon 5500 series features a second QPI to allow dual CPUs to communicate directly with one another. This in turn allows one processor's allocated memory to be used by the other via QPI and, looking ahead, we'll be seeing four QPI links when Intel's Nehalem-based 4P systems see the light of day.

Knowing that performance fiends will be rubbing their hands at the thought of two Nehalem parts in a single setup, let's take a look at Intel's supporting workstation board - the S5520SC.