Intel lifts wraps on next-generation Larrabee: should NVIDIA and ATI be worried?

Graphics

Published: Monday 4th August, 2008 | Author: Tarinder Sandhu
Companies: Intel (All Intel content)

printer friendly layout discuss this review in the forums

discuss in the forums email this review to a friend

email to a friend

Next page: The architecture

Introduction

L1 In a paper that's to be published at SIGGRAPH next week, Intel outlined a few more architectural details on its upcoming hybrid VPU architecture that's currently known by the codename Larrabee.

Positing it as an architecture that harnesses the pervasive x86 feature-set endemic to millions of CPUs, as well as providing the general programmability and massive parallel processing that characterises modern GPUs, Larrabee is an in-order throughput design that uses a many-x86 core approach and dedicated logic to solving the VPU problem, according to Intel's Larry Sieler, who headed a conference call last Friday.

It would be rude to not take a brief look at what makes Larrabee tick, so read on.

Next page: The architecture